Andrea Pietracaprina was born in Sassari, Italy, on September 17, 1963. He received the Laurea degree (summa cum laude) in Computer Science (1987) from the University of Pisa, Italy, co-winning best undergraduate thesis awards from IBM-Italia and UNITEAM. He received the M.S. (1991) and Ph.D. (1994), both in Computer Science, from the University of Illinois at Urbana-Champaign, Urbana-Champaign, IL, USA. From 1989 to 1994 he has been Research Assistant at the University of Illinois at Urbana-Champaign and at Brown University, Providence, RI USA. In 1994, he spent a year as a Postdoctoral Fellow at the Department of Information Engineering of the University of Padova. Since 1994, he has been with the University of Padova, first as Assistant Professor at the Department of Pure and Applied Mathematics (1994-1998), then as Associate Professor (1998-2002) and Full Professor (since Dicember 2002) at the Department of Information Engineering.

Andrea Pietracaprina's main research interests concern: high-performance computing, models of computation, algorithms and data structures for parallel and/or hierarchical platforms, data mining, and network routing. He has authored or co-authored over 50 papers appeared in international journals and conference proceedings, and several technical reports. He has been: coordinator of a CNR bilateral project Load Balancing and Exhaustive Search Techniques for Parallel Architectures, in collaboration with the University College Cork, Cork, IRL (1996-1999); principal investigator of a NATO project Bulk Synchronous Computational Geometry, in collaboration with Texas A&M University, College Station, USA (1996-1997); principal investigator for the project funded by the University of Padova: A Programming Framework for Parallel and Hierarchical Machines: Theory and Implementation (2004-2006); and key researcher for several projects supported by the Italian Ministry of Education and Research (MIUR), CNR, and the EU. He has also been reviewer for projects funded within the 5th EU Framework Programme.

Since 2004 Andrea Pietracaprina is Associate Editor for the IEEE Transactions on Parallel and Distributed Systems. He has served as a member of the program committees for several international conferences: International Euro-Par Conference (1998, 2004, 2005), ACM Symposium on Parallel(ism in) Algorithms and Architectures (SPAA: 2002, 2005), Italian Conference on Theoretical Computer Science (ICTCS: 2003), International Workshop on Efficient and Experimental Algorithms (WEA: 2005), International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN: 2005), and Parallel Architectures and Compilation Techniques (PACT: 2007). He has also been involved in the organization of a number of international conferences (ACM SPAA'96, ESA'98, ICALP'06) and schools. He is currently member of the Advisory Board of the International Euro-Par Conference.