Capitoli di libri P. Olivo e M. Dalpasso, A BIST Scheme for Non-Volatile Memories, pagg. 139-144, in ON-LINE TESTING FOR VLSI, a cura di M. Nicolaidis, Y. Zorian e D. K. Pradan, pubblicato da Kluwer Academic Publishers, 1998 Riviste M. Favalli e M. Dalpasso, Simulazione di guasti in circuiti integrati digitali , Alta Frequenza, Vol. 4, N. 1, pagg. 13-22, Gen.-Feb. 1992 M. Dalpasso, M. Favalli, P. Olivo e B. Riccò, Fault Simulation of Parametric Bridging Faults in CMOS ICs , IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. CAD-12, pagg. 1403-1410, Settembre 1993 M. Favalli, M. Dalpasso, P. Olivo e B. Riccò, Analysis of Resistive Bridging Fault Detection in BiCMOS Digital ICs, IEEE Transactions on VLSI Systems, Vol. 1, pagg. 342-355, Settembre 1993 M. Dalpasso, M. Favalli, P. Olivo e J. P. Teixeira, Realistic testability estimates for CMOS ICs, IEE Electronics Letters, Vol. 30, N. 19, pagg. 1593-1595, 15 Settembre 1994 M. Dalpasso, Advanced Test Pattern Generation for CMOS IDDQ Testing, Alta Frequenza, Vol. 8, N. 2, pagg. 57-59, Mar.-Apr. 1996 M. Dalpasso, M. Favalli e P. Olivo, IDDQ Test Invalidation by Break Faults , IEE Electronics Letters, Vol. 32, N. 11, pagg. 994-995, 23 Maggio 1996 M. Favalli, M. Dalpasso e P. Olivo, Modeling and Simulation of Broken Connections in CMOS ICs , IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 15, N. 7, pagg. 808-914, Luglio 1996 M. Favalli e M. Dalpasso, Symbolic Handling of Bridging Fault Effects, Journal of Electronic Testing, Theory and Applications, Kluwer Academic Publishers, Vol. 10, N. 3, pagg. 271-276, Giugno 1997 M. Dalpasso e M. Favalli, A Method for Increasing the IDDQ Testability , IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 16, N. 10, pagg. 1186-1188, Ottobre 1997 P. Olivo e M. Dalpasso, A BIST Scheme for Non-Volatile Memories, Journal of Electronic Testing, Theory and Applications, Kluwer Academic Publishers, Vol. 12, N. 1/2, pagg. 139-144, Febbraio/Aprile 1998 M. Dalpasso, A. Bogliolo e L. Benini, Virtual Simulation of Distributed IP-based Designs, IEEE Design & Test of Computers, Vol. 19, N. 5, pagg. 92-104, Settembre/Ottobre 2002 M. Favalli e M. Dalpasso, Bridging Fault Modeling and Simulation for Deep Submicron CMOS ICs, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 21, N. 8, pagg. 941-953, Agosto 2002 M. Dalpasso, G. Lancia e R. Rizzi, The String Barcoding Problem is NP-Hard, Lecture Notes in Computer Science, Vol. 3678 / 2005, pagg. 88-96 M. Favalli e M. Dalpasso, How many Test Vectors We Need to Detect a Bridging Fault?, Journal of Electronic Testing, Theory and Applications, Kluwer Academic Publishers, Vol. 25, N. 1, pagg. 79-95, Febbraio 2009 M. Favalli e M. Dalpasso Applications of Boolean Satisfiability to Verification and Testing of Switch-Level Circuits, Journal of Electronic Testing, Springer, Vol. 30, N. 1, pagg. 41-55, Febbraio 2014 L. Valenti, M. Dalpasso e M. Favalli, Efficient testing of multi-output combinational cells in nano-complementary metal oxide semiconductor integrated circuits, IET Computers & Digital Techniques, Vol. 8, N. 2, pagg. 83-89, Marzo 2014 M. Dalpasso e G. Lancia, Estimating the strength of poker hands by integer linear programming techniques, Central European Journal of Operations Research, Vol. 23, N. 3, pagg. 625-640, Settembre 2015 M. Favalli e M. Dalpasso, Boolean and Pseudo-Boolean Test Generation for Feedback Bridging Faults, IEEE Transactions on Computers, Vol. 65, N. 3, pagg. 706-715, Marzo 2016 M. Dalpasso e G. Lancia, New modeling ideas for the exact solution of the closest string problem, International Conference on Database and Expert Systems Applications, Communications in Computer and Information Science, pagg. 105-114, Settembre 2018 G. Lancia e M. Dalpasso, Speeding-up the Exploration of the 3-OPT Neighborhood for the TSP, New Trends in Emerging Complex Real Life Problems, AIRO Springer Series, pagg. 345-355, Settembre 2018 G. Lancia e M. Dalpasso, FASTSET: A Fast Data Structure for the Representation of Sets of Integers, MDPI Algorithms, Vol. 12, 2019 G. Lancia e M. Dalpasso, Speeding-up the dynamic programming procedure for the edit distance of two strings, International Conference on Database and Expert Systems Applications, Communications in Computer and Information Science, pagg. 59-66, Agosto 2019 G. Lancia e M. Dalpasso, Algorithmic Strategies for a Fast Exploration of the TSP 4-OPT Neighborhood, Advances in Optimization and Decision Science for Society, Services and Enterprise, AIRO Springer Series, pagg. 457-470, Settembre 2019 G. Lancia e M. Dalpasso, Finding the Best 3-OPT Move in Subcubic Time, MDPI Algorithms, Vol. 13, 2020 F. Dall'Occo, M. Dalpasso e M. Favalli, Techniques for SAT-Based Boolean Reasoning on Multiple Faults Affecting Logic Cells and Interconnects in Digital ICs, MDPI Electronics, Vol. 11, 2022 G. Lancia e M. Dalpasso Algorithmic strategies for a fast exploration of the TSP 4 -OPT neighborhood, Journal of Heuristics, 2023 Conferenze con pubblicazione di Atti M. Dalpasso, M. Favalli, P. Olivo e B. Riccò, Switch-Level Fault Simulation by Critical-Path Tracing , IEEE European Test Conference, pagg. 181-190, Aprile 1991 M. Ambanelli, M. Favalli, M. Dalpasso, P. Olivo e B. Riccò, Fault Simulation of Multiple Faults in PLAs, IEEE Annual European Computer Conference (CompEuro), pagg. 229-232, Maggio 1991 M. Favalli, S. Ercolani, M. Dalpasso, P. Olivo e B. Riccò, Weighted Pseudorandom Generation for Built-In Self-Test , IEEE Annual European Computer Conference (CompEuro), pagg. 572-574, Maggio 1991 M. Favalli, M. Dalpasso, P. Olivo e B. Riccò, Analysis of Steady State Detection of Resistive Bridging Faults in BiCMOS Digital ICs, IEEE International Test Conference, pagg. 466-475, Settembre 1992 M. Dalpasso, M. Favalli, P. Olivo e B. Riccò, Parametric Bridging Fault Characterization for the Fault Simulation of Library-Based ICs, IEEE International Test Conference, pagg. 486-495, Settembre 1992 M. Dalpasso, M. Favalli, P. Olivo e B. Riccò, Influence of IC synthesis on the Random Pattern Testability of Parametric Bridging Faults, IEEE European Test Conference, pagg. 398-407, Aprile 1993 M. Favalli, M. Dalpasso, P. Olivo e B. Riccò, Analysis of Dynamic Effects of Resistive Bridging Faults in CMOS and BiCMOS Digital ICs, IEEE International Test Conference, pagg. 865-874, Ottobre 1993 M. Favalli, M. Dalpasso, P. Olivo e B. Riccò, Modeling of Broken Connections Faults in CMOS ICs , IEEE European Design and Test Conference, pagg. 159-164, Febbraio-Marzo 1994 M. Dalpasso, M. Favalli e P. Olivo, Correlation between IDDQ Testing Quality and Sensor Accuracy, IEEE European Design and Test Conference, pagg. 568-572, Marzo 1995 M. Dalpasso, M. Favalli e P. Olivo, Test Pattern Generation for IDDQ: Increasing Test Quality , IEEE VLSI Test Symposium, pagg. 304-309, Aprile-Maggio 1995 M. Dalpasso e M. Favalli, Binary Decision Diagrams (BDDs) for the Test Pattern Generation, IEE International Conference on Software for Electrical Engineering Analysis and Design, pagg.95-104, Maggio 1996 P. Olivo e M. Dalpasso, Self-Learning Signature Analysis for Non-Volatile Memory Testing, IEEE International Test Conference, pagg. 303-308, Ottobre 1996 M. Dalpasso, A. Bogliolo e L. Benini, Specification and validation of distributed IP-based designs with JavaCAD, IEEE/ACM Design Automation and Test in Europe Conference, pagg. 684-688, Marzo 1999 M. Dalpasso, A. Bogliolo e L. Benini, Virtual Simulation of distributed IP-based designs , IEEE/ACM Design Automation Conference, pagg. 50-55, Giugno 1999 M. Dalpasso, A. Bogliolo L. Benini e M. Favalli, Virtual Fault Simulation of distributed IP-based designs , IEEE/ACM Design Automation and Test in Europe Conference 2000, pagg. 99-103, Marzo 2000 M. Dalpasso, A. Bogliolo e L. Benini, Hardware/Software IP protection, IEEE/ACM Design Automation Conference 2000, pagg. 593-596, Giugno 2000 M. Favalli e M. Dalpasso, An evolutionary approach to the design of on-chip pseudorandom test pattern generators, IEEE/ACM Design Automation and Test in Europe Conference 2002, Marzo 2002 F. Bombi, G. Clemente, S. Congiu, M. Dalpasso, F. Filira, M. Furin, M. Moro, M. Sgargetta e R. Verago, A new multimedia distributed system for on-line advanced teleteaching, International Conference ICL (Interactive Computer Aided Learning), Settembre 2005 F. Bombi, G. Clemente, S. Congiu, M. Dalpasso, F. Filira, M. Furin, M. Moro, M. Sgargetta e R. Verago, A new multimedia distributed system for live teaching, Iadat-e2006 - 3rd International Conference on Education, Luglio 2006 F. Bombi, G. Clemente, S. Congiu, M. Dalpasso, F. Filira, M. Furin, M. Moro, M. Sgargetta e R. Verago, Live teaching with an advanced multimedia distributed system, IODL2006 - 2nd International Open & Distance Learning Symposium, Settembre 2006 M. Favalli e M. Dalpasso, High Quality Test Vectors for Bridging Faults in the Presence of IC's Parameters Variations, 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '07), pagg. 448-456, Settembre 2007 F. Filira, N Anghelidis e M. Dalpasso, Tele-Assessment of the Tele-Taught University Degree in Computer Science Engineering, iLearning Forum 2008, 2008 F. Filira, G. Boccuzzo, M. Dalpasso e N. Anghelidis, Effectiveness assessment of tele-taught vs. traditional courses of a 3-year university degree in compuoter science engineering, INTED2008 International Conference, Marzo 2008 M. Dalpasso e G. Lancia, Computing the equity of a poker hand by Integer Linear Programming, International Symposium on Operational Research 2013, Settembre 2013 M. Dalpasso, D.Bertozzi and M. Favalli, A Boolean Model for Delay Fault Testing of Emerging Digital Technologies based on Ambipolar Devices, Design, Automation and Test in Europe (DATE 2018), pagg. 297-300, Marzo 2018 M. Dalpasso e G. Lancia, New modeling ideas for the exact solution of the closest string problem, International Workshop on Biological Knowledge Discovery from Data (BIOKDD 2018), pubblicato in International Conference on Database and Expert Systems Applications, nella serie Communications in Computer and Information Science, pagg. 105-114, Settembre 2018 G. Lancia e M. Dalpasso, Speeding-up the Exploration of the 3-OPT Neighborhood for the TSP, International Conference on Optimization and Decision Science (ODS 2018), pubblicato in New Trends in Emerging Complex Real Life Problems, nella serie AIRO Springer Series, pagg. 345-355, Settembre 2018 G. Lancia e M. Dalpasso, Speeding-up the dynamic programming procedure for the edit distance of two strings, International Workshop on Biological Knowledge Discovery from Data (BIOKDD 2019), pubblicato in International Conference on Database and Expert Systems Applications, nella serie Communications in Computer and Information Science, pagg. 59-66, Agosto 2019 G. Lancia e M. Dalpasso, Algorithmic Strategies for a Fast Exploration of the TSP 4-OPT Neighborhood, International Conference on Optimization and Decision Science (ODS 2019), pubblicato in Advances in Optimization and Decision Science for Society, Services and Enterprise, nella serie AIRO Springer Series, pagg. 457-470, Settembre 2019 Conferenze senza pubblicazione di Atti M. Dalpasso, Approaching the Synthesis for Testable Circuits Beyond the Stuck-At Fault Model, ARCHIMEDES Open Workshop on Synthesis of Testable Circuits , Bologna, Italia, Febbraio 1994 M. Dalpasso, IDDQ Testing di circuiti integrati CMOS, ELETTRONICA 95 -- Riunione Annuale del Gruppo di Elettronica del CNR, Riva del Garda, Trento, Italia, Giugno 1995 P. Olivo e M. Dalpasso, Self-Learning Signature Analysis for Non-Volatile Memory Testing, IEEE European Test Workshop, Montpellier, Francia, Giugno 1996 P. Olivo e M. Dalpasso, A BIST Scheme for Non-Volatile Memories, IEEE International On-Line Testing Workshop, Biarritz, Francia, Luglio 1996 P. Olivo e M. Dalpasso, A BIST Scheme for Non-Volatile Memories, IEEE Non-Volatile Semiconductor Memory Workshop, Monterey, California, USA, Febbraio 1997 G. Lancia, M. Dalpasso e R. Rizzi, The String Barcoding Problem is NP-Hard, RECOMB 2005 Satellite Workshop on Comparative Genomics, Settembre 2005 Tesi di Laurea in Ingegneria Elettronica Simulazione a livello switch di circuiti integrati CMOS, 21 Febbraio 1990, Bologna, Italia. Tesi di Dottorato in Ingegneria Elettronica e Informatica Analisi, Modellistica e Simulazione di Guasto in Circuiti Integrati CMOS, 25 Luglio 1994, Roma, Italia.