My main research area is the design and analysis of fast
and scalable algorithms that fully exploit the resources available in modern
computing architectures, with a focus on parallel processing and memory
hierarchies. In particular, I have been working on the following topics:
- MapReduce algorithms. MapReduce is a parallel
programming paradigm for big-data processing which hides low level details (e.g.,
load balancing, fault tolerance) to programmers at the cost of a rigid structure
of the computation. My research targets the design and analysis of efficient
- Communication-efficient algorithms.
Communication is a major factor determining the performance of parallel
algorithms. Indeed, time and energy for sending/receiving a message is
significantly higher than that of performing CPU operations. My research focuses
on the design and analysis of communication-efficient algorithms.
- Memory-efficient algorithms. When processing
large datasets that do not fit the main memory, the performance of an algorithm
is mainly influenced by the input/output (I/O) accesses to the storage system. My
work investigates to which extent algorithms can reduce I/Os by exploiting the
- Resilient algorithms. Large-scale platforms
are highly vulnerable to transient silent memory errors. For technical and
economic motivations, these errors are not caught by hardware and may affect the
correctness of an algorithm. My work studies algorithms that are resilient to
these silent errors in such a way that a memory corruption does not affect the
I received the Laurea degree (summa cum laude, 2005) and the Ph.D. degree
(2009), both in Computer Engineering, from the University of Padova and under the
supervision of Prof.
Andrea Pietracaprina. Since 2009, I have been postdoctoral researcher at the
Department of Information Engineering of the
University of Padova. From 2013 to 2014 I was visiting scholar with Prof. Rasmus Pagh and
part-time lecturer at the IT University of
Copenhagen. From 2007 to 2008, I visited the Department of Computer Science of
the University of Texas at Austin, under the supervision of Prof. Vijaya
I have been in the program committees of: ESA 2015, IEEE IPDPS
2015, 2013 MASSIVE 2014, ACM/IEEE SC 2014, 2013 (Poster section), IEEE
BigData 2013, IEEE IPDPS
I have also been in the organizing committees of: IEEE CLUSTER 2015, IEEE IPDPS 2015-2013, ACM ICS 2012, ESSIR 2009.
Are you looking forward to learn more about me? Please, download my curriculum!
You are visitor #