ESD Sign off Lead

Dal 26.09.2022 al 31.12.2022

Descrizione Azienda:

Descrizione Posizione Offerta:
Job Title - ESD Sign off Lead

     ESD Circuit design for GPIOs, High Speed IOs, Analog IOs and Complex
RFIC/Analog Blocks
     Responsible for the complete ESD design lifecycle, from system-level
concept to tape out
     Responsible for Full Chip ESD sign off for digital and mixed-signal ASIC
designs in advanced CMOS / FinFET process nodes.
     Post Silicon validation and debugging of ESD failures
     In this high visibility role, you will be working with globalengineering
teams such as Design engineering, Layout, Packaging, Product engineering,
System engineering teams to make sure JEDEC standards for ESD and latch-up
are met

     MS + minimum 10 years of experience in related field
     Deep understanding of various ESD standards- HBM, CDM, etc.
     Extensive IO circuit design, verification, or related work experience
     In depth understanding of advanced process nodes and circuit design
     Advanced knowledge of CAD design tools such as Cadence Virtuoso (Layout)
     Advanced knowledge of HBM and CDM ESD structures, Latch up and
Reliability requirements
     Familiar with Simultaneous Noise Simulations and Full Chip IOIntegration
     Familiar with Power & Signal Integrity and understanding of signal
switching, noise & design issues

Job location:
Carlsbad, (near San Diego) CA

Contatto per Candidature:
Paolo Miliozzi
Vice President, SOC Design and Technology at MaxLinear
Irvine, California, United States